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Susie E. Maestre

Assistant Professor

Biography

Susie Maestre is a faculty member of the Electrical and Electronics Engineering department and currently holds the position of department chair.

Education

  • BS Electronics and Communications Engineering, Mindanao State University - Marawi (Cum Laude, March 2014)
    - Registered Electronics Engineer, 2014
  • MS Electrical Engineering (Microelectronics), Mindanao State University - IIT (2022)

Specializations

  • Microelectronics

Courses Taught

  • Digital VLSI and Analog IC Design
  • Data Communications
  • Fundamentals of Electronic Communications
  • Electronic Circuits and Devices
  • Research Methods

Publications

  • S. A. Khalid, S. E. Maestre and K. M. Madrid-Khalid, "Open-LUT: Interactive gm/ID Lookup Tables for MOSFET Sizing in Open-Source PDK", The 10th International Conference on Integrated Circuits and Microsystems (ICICM 2025), Hefei, China, October 2025 (forthcoming)
  • K. M. Canonero, J. S. Bernales, A. G. Macapundag, S. A. Khalid and S. E. Maestre, "Design of a Bandgap Voltage Reference for an 8-bit SAR-ADC for Powerline Monitoring using SKY130 PDK", The 10th International Conference on Integrated Circuits and Microsystems (ICICM 2025), Hefei, China, October 2025 (forthcoming)
  • S. Maestre, A. Gumera, J. Hora and M. J. de Guzman, "Improving Digital Design PPA (Performance, Power, Area) using iSpatial Physical Restructuring," 2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Phuket, Thailand, 2022, pp. 647-651

Research Projects